JAGAN MOHANRAO PENAGANTI — Software Engineer

To secure a challenging position in onsite where I can effectively contribute my skills as Professional. 3 years of experience as Physical Design Engineer. Currently working in Altran Technologies India Pvt Ltd, Bangalore. B. Tech (Electronics & Communication) from JNTU Kakinada with the aggregate of 75.59% , 2013. Knowledge in  Physical Design Flow(Synthesis to GDS-II(including signoff)) ,  Block level static timing analysis,  DRC/LVS fixing, knowledge in top-level DRC/LVS fixing,  IO ring design,  Formality checks analysis and fixing,  Basic knowledge in library/lef generation using Memory Compiler tool. EDA Tools : ICC,ICC-II, EDI & Olympus for PNR, Calibre for LVS and DRC, Cadence ETS for STA, Conformal LEC& Formality ,RTL Compiler, Design Compiler and Voltus for power calculation, Memory Compiler.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Physical Design and Verification.

Location: Bengaluru, Karnataka, India

Experience: 11 yrs 3 mos