Jan 2019 – Jun 2025 · 6 yrs 5 mos · Greater Bengaluru Area

Aug 2017 – Dec 2018 · 1 yr 4 mos · Bengaluru, Karnataka, India

Jan 2016 – Jul 2017 · 1 yr 6 mos · Bengaluru, Karnataka, India

• Lead successful tape out for projects in Qualcomm. Managed directly a team of eight members for three projects on different nodes and supervised a team of 28 engineers on behalf of Mindlance for multiple other projects of Qualcomm.

Nov 2014 – Jan 2016 · 1 yr 2 mos · Greater Bengaluru Area

• Worked at Qualcomm for multiple projects on behalf of Mirafra.
• Did block and sub system level implementation of WLAN Sub System including top level partition.
• Received "QualStar Award" for delivering ~1M instance block with closing timing at lower voltage than nominal without compromising Speed with High Utilization

Apr 2011 – Oct 2014 · 3 yrs 6 mos · Bangalore

• Worked on complex SOC Blocks implementation using Custom Tools
• Worked on High performance North Bridge Blocks Using EDA Tools
• Implemented Low Power Blocks from Graphics Chip
• Worked on Full chip PnR Implementation of Graphics Core having 39 hierarchical Blocks
• Have done Budgetting from Full chip SDC to generated Block level SDC
• Recieved "Geo Business Unit Award"​ for delevering High Speed SOC block within very tight schedule with Greate quality
• Recieved "Spot Recongnition Award" for Delievering quality Database for block level from Full chip database

Mar 2009 – Mar 2011 · 2 yrs

• Completed Physical design Implementation using different EDA tools such as Magma Talus-Vortex & Soc-Encounter
• Worked on Custom Clock & Data Implementation for DDR Interface
• Signed off Static Timing Analysis using Prime Time
• Analyzed Timing Reports and Implemented Timing ECO's to meet Block timing requirement
• Signed off Physical verification using Calibre
• Did DRC/LVS fixing in PnR Tool from error file generated from Calibre