AJIT KAKADIYA — Software Engineer
Stackforce AI infers this person is a Silicon Design Verification Engineer with expertise in hardware design and verification.
Location: Ahmedabad, Gujarat, India
Experience: 8 yrs 4 mos
Skills
- Verilog
- Universal Verification Methodology (uvm)
Career Highlights
- Expert in Silicon Design Verification
- Proficient in Verilog and UVM methodologies
- Experience with FPGA technology
Work Experience
AMD
Sr. Silicon Design Verification Engineer (2 yrs 3 mos)
AumRaj Design Systems Pvt Ltd.
Sr. Silicon Design Verification Engineer (6 yrs 1 mo)
Indian Institute of Technology Gandhinagar
Engineering Intern (11 mos)
Education
Master's degree at Vishwakarma Government Engineering College
Bachelor's degree at Saraswti Institute of Engineering & Management(SIEM), kadi
