SAMUEL PAUL RAPAKA — Software Engineer
To work with dedication and strive for excellence as well as perfection in the assigned task in Physical Design.To be a better individual by constant self-motivated learning and improvement. i.e., Physical Design , Physical Verification , STA, Synthesis.
Stackforce AI infers this person is a VLSI Design expert with a focus on Physical Design and Verification.
Location: Bengaluru, Karnataka, India
Experience: 10 yrs 1 mo
Skills
- Physical Design
- Static Timing Analysis
- Synthesis
- Gdsii
- Physical Verification
Career Highlights
- Expert in Physical Design and Verification processes.
- Proficient in Static Timing Analysis and Synthesis.
- Strong background in managing end-to-end design flows.
Work Experience
Qualcomm
Senior Physical Design Engineer (4 yrs 7 mos)
Mirafra Technologies
Senior Physical Design Engineer (9 mos)
LeadSoc Technologies Pvt Ltd
Senior Physical Design Engineer (2 yrs 5 mos)
Mindlance Technologies
Physical Design Engineer - I (1 yr 2 mos)
RV-VLSI VLSI and Embedded Systems Design Center
Physical Design Graduate Trainee (6 mos)
Electronics Corporation of India Limited (ECIL), Department of Atomic Energy, Government of India.
Post Graduate Trainee Engineer (7 mos)
Education
Master’s Degree at Andhra University
Bachelor’s Degree at Raghu Institute of Technology - India
Associate’s Degree at Vikas Junior College
High School at BHASHYAM PUBLIC SCHOOL