Monish NK — Software Engineer
A detail-oriented VLSI professional with leadership, organizational and teamwork skills with relevant experiences in ASIC Verification Methodologies like Functional Coverage based and Assertion based Verification and having an experience working on Coverage driven CORE- RTL Verification environment. Professionally trained on ASIC Front-end Design and Verification from Maven Silicon VLSI Design and Training Center. Expertize in UVM Methodology, System Verilog/SV Assertions and OOP Concepts with basic knowledge about PERL Scripting and Knowledge of AMBA AXI4 Protocol Validation. High-level knowledge about Industry Automation gained from working with former Automation companies. Connections from the VLSI Background are welcome here and lets make an impact of VLSI Technology on the society.
Stackforce AI infers this person is a VLSI professional with strong ASIC verification expertise.
Location: Bengaluru, Karnataka, India
Experience: 7 yrs 4 mos
Skills
- Asic Front-end Design And Verification
- Universal Verification Methodology (uvm)
Career Highlights
- Expertise in UVM Methodology and System Verilog.
- Strong foundation in ASIC Verification Methodologies.
- Detail-oriented professional with leadership skills.
Work Experience
Intel Corporation
Pre-Silicon Core Validation Engineer (5 yrs)
Pre-silicon Validation Engineer (1 yr 3 mos)
Robert Bosch Engineering and Business Solutions Vietnam
Intern (5 mos)
Yokogawa
Safety Instrumented Systems Engineer (1 yr 1 mo)
Education
Master of Technology at RV College Of Engineering
Bachelor of Engineering (B.E.) at RV College Of Engineering
PUC at St.Josephs Pre-University
