jeevan kumar neela

CEO

Bangalore, Karnataka, India9 yrs experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in Universal Verification Methodology (UVM) and System Verification.
  • Strong background in VLSI with a Master's degree.
  • Proven track record in the semiconductors industry.
Stackforce AI infers this person is a semiconductor design engineer with expertise in verification methodologies.

Contact

LinkedIn

Skills

Other Skills

SVBashUnixC++VerilogTCLStatic Timing AnalysiscshelSystem verilDebuggingApplication-Specific Integrated Circuits (ASIC)System on a Chip (SoC)

About

Experienced Software Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Universal Verification Methodology (UVM), Perl, System Verification, Csh, and C. Strong engineering professional with a Master of Technology - MTech focused in Vlsi from Sreenidi Institute of Science &Technology.

Experience

9 yrs
Total Experience
2 yrs 3 mos
Average Tenure
3 yrs 3 mos
Current Experience

Cadence design systems,bangaore

Lead Design Engineer

Feb 2023 – Present · 3 yrs 3 mos · Bengaluru, Karnataka, India · Hybrid

Amd

SENIOR SILICON DESIGN ENGINEER

Apr 2022 – Feb 2023 · 10 mos · Hyderabad, Telangana, India

Samsung semiconductor india research

ASSOCIATE STAFF ENGINEER

Apr 2021 – Apr 2022 · 1 yr · Bangalore Urban, Karnataka, India

Soctronics

Design Verification Engineer

Feb 2020 – Apr 2021 · 1 yr 2 mos · Hyderabad, Telangana, India

Soctronics

Verification Engineer

May 2017 – Feb 2020 · 2 yrs 9 mos · Hyderabad Area, India

Education

Sreenidi Institute of Science &Technology

Master of Technology - MTech — Vlsi

Jan 2013 – Jan 2016

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