Mohamed Irfan — Product Manager
VLSI Design Verification Lead | 15+ Years of Experience | SoC & IP-Level DV | ARM Coresight Debug & Telemetry | Network & Modem Silicon I am a seasoned Design Verification professional with over 14 years of hands-on experience in the pre-silicon validation of complex SoCs covering domains like modem front-end design, data center, IoT-based silicon and networking chips. I’ve led the verification of ARM Coresight Debug, RISC-V based CPU’s SS and Telemetry architectures owning complete verification cycles from spec analysis and strategy definition to testbench development, execution and sign-off. My work has spanned both subsystem and SoC-level verification with a focus on interconnect DV, protocol compliance and performance validation in high-complexity environments. 🔹 Core competencies and contributions: • Full ownership of ARM Coresight SoC-400 Debug and Telemetry block DV at SoC level • Framework development for modem front-end design verification (formerly LTE) • SoC-level interconnect verification including NCI-AMBA based fabric with VIP integration and performance analysis • Verification of network silicon at the IP level – including Ethernet MAC, PCS blocks, and 10G-level data paths • Developed testbench architecture and bring-up from scratch for PCS blocks with interrupt handling • Verification of PIPE-compliant interfaces (USB, SATA, PCIe) • Strong expertise in Design-for-Debug (DFD) flows and trace/debug signal validation • Tool migration experience from VCS to Questa, with associated automation • Scripting utilities for log parsing, XML generation and regression handling I’m proficient in SystemVerilog, Verilog, and UVM with a deep understanding of constrained-random verification, functional coverage and debugging at scale. I’ve led verification teams, driven milestone closures and consistently delivered high-quality silicon validation across IP and SoC domains.
Stackforce AI infers this person is a Semiconductor Design Verification Expert with extensive experience in complex SoC and IP-level validation.
Location: Bengaluru, Karnataka, India
Experience: 14 yrs 5 mos
Skills
- Design Verification
- Debugging
Career Highlights
- Over 14 years of experience in VLSI Design Verification.
- Led verification of ARM Coresight Debug and Telemetry architectures.
- Expertise in high-complexity SoC and IP-level verification.
Work Experience
Arm
Principal SoC DV (1 yr 7 mos)
Tenstorrent Inc.
DV (1 yr 7 mos)
Qualcomm
Staff Design Verification Engineer (2 yrs 2 mos)
Intel Corporation
DFX Design Verification Engineer (1 yr 11 mos)
MediaTek
Staff Engineer (2 yrs 2 mos)
Cadence Design Systems
Design Engineer 2 (1 yr 3 mos)
Infinera
Design Verification Engineer (1 yr 10 mos)
Wireless Communications startup
Design Verification Engineer (2 yrs 2 mos)
Education
Bachelor of Technology (B.Tech.) at Pondicherry University
