srilatha dharpally

Software Engineer

Hyderabad, Telangana, India4 yrs 1 mo experience

Highly Stable

Key Highlights

Expert in Physical Design Engineering with extensive tool knowledge.
Proficient in Clock Tree Synthesis and Design Rule Checking.
Strong experience in Place & Route methodologies.

Stackforce AI infers this person is a Physical Design Engineer specializing in semiconductor design and verification.

Contact

Skills

Core Skills

Physical Design Engineering

Other Skills

ICCPlace & RouteSynopsys toolsClock Tree SynthesisDesign Rule Checking (DRC)UnixinnovuslvsECOStatic Timing AnalysisFloorplanningTCL

Experience

4 yrs 1 mo

Total Experience

3 yrs 6 mos

Average Tenure

7 mos

Current Experience

Quest global

Senior Physical Design Engineer

Nov 2025 – Present · 7 mos · Hyderabad, Telangana, India · On-site

ICCPlace & RoutePhysical Design Engineering

Qualcomm

Physical Design Engineer

Feb 2024 – Nov 2025 · 1 yr 9 mos · Hyderabad, Telangana, India · On-site

Synopsys toolsClock Tree SynthesisPhysical Design Engineering

Amd

Physical Design Engineer

Jun 2022 – Nov 2023 · 1 yr 5 mos · Hyderabad, Telangana, India · Remote

Clock Tree SynthesisDesign Rule Checking (DRC)Physical Design Engineering

Smartsoc solutions pvt ltd

Physical Design Engineer

May 2022 – Nov 2025 · 3 yrs 6 mos · Hyderabad, Telangana, India

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