Kirti Kansal

Software Engineer

United Kingdom7 yrs 7 mos experience

Key Highlights

  • Expertise in SOC Verification and ARM architecture.
  • Proficient in multiple scripting languages including Python and Perl.
  • Strong background in formal verification and UVM.
Stackforce AI infers this person is a highly skilled verification engineer in the semiconductor industry.

Contact

Skills

Core Skills

Universal Verification Methodology (uvm)SystemverilogFormal VerificationSystem On A Chip (soc)

Other Skills

Power SystemsScriptingVerificationPerlDebuggingLinuxC (Programming Language)Virtual Memoryaddress translationCache CoherencyPython (Programming Language)ARM ArchitecturecacheingDebuggersinvasive

About

*Working on power rail projects *Knowledge of SOC Verification of SRAM Controller, I2C, DMA, PLL, Clocking, Reset and PMC *Bash shell scripting, TCL, Perl and Python *SOC Verification of digital circuits using C stimulus and SV/UVM handshaking *Understanding of serial protocols: SPI, I2C AMBA protocols: APB, AHB, AXI *Understanding of ARM Coresight architecture *Working experience of verification of Debug DSP, PPA, CA53, CA78 cores in radar SOC *Working experience of MIPI ATE/VFT patterns *Knowledge of formal verification using VC formal FPV and CC *Expertise in CRR(Common Register Repository) verification

Experience

7 yrs 7 mos
Total Experience
1 yr 5 mos
Average Tenure
1 yr 4 mos
Current Experience

Analog devices

Senior Design and Verification Engineer

Feb 2025Present · 1 yr 4 mos · London Area, United Kingdom · On-site

  • Custom Silicon Solutions Group
Universal Verification Methodology (UVM)SystemVerilogPower SystemsScripting

Nxp semiconductors

Lead Engineer

Jul 2023Jan 2025 · 1 yr 6 mos · Noida, Uttar Pradesh, India · On-site

Nxp semiconductors by incise

Design Verification Engineer

Nov 2021Jun 2023 · 1 yr 7 mos · India

Universal Verification Methodology (UVM)Formal VerificationSystem on a Chip (SoC)VerificationPerlDebugging

Incise infotech private limited

Verification Engineer

Sep 2021Dec 2022 · 1 yr 3 mos · Noida

SystemVerilogLinuxSystem on a Chip (SoC)PerlC (Programming Language)

Agnisys, inc.

Associate R&D Engineer

Sep 2019Sep 2021 · 2 yrs · Noida, Uttar Pradesh, India

Amity institute of training & development - aitd

Lecturer in Physics

Jun 2015Jun 2016 · 1 yr · Hauz Khas, Delhi, India · On-site

  • provided IIT-JEE and NEET coaching

Dkop labs pvt ltd

intern

Sep 2012Sep 2014 · 2 yrs · Noida Area, India

  • Basic course of VERILOG, SYSTEM VERILOG, CMOS, ADVANCED VLSI(ANALOG), FPGA, DIGITAL ELECTRONICS, LINUX, C, C++, UVM
Perl

Education

Maharaja Surajmal Institute Of Technology

Bachelor's degree

Jan 2011Jan 2015

Stackforce found 100+ more professionals with Universal Verification Methodology (uvm) & Systemverilog

Explore similar profiles based on matching skills and experience