Brajesh Kumar

Product Engineer

Ranchi, Jharkhand, India4 yrs 2 mos experience
Highly Stable

Key Highlights

  • 4 years of experience in advanced analog layout design.
  • Expertise in high-speed analog blocks for HBM PHY.
  • Proficient in Synopsys tools and physical verification.
Stackforce AI infers this person is a Semiconductor Design Engineer specializing in analog layout for advanced nodes.

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Skills

Core Skills

Analog Layout DesignPhysical Design

Other Skills

Global Distribution Systems (GDS)Layout Versus Schematic (LVS)PNRFloorplanningDesign Rule Checking (DRC)Very-Large-Scale Integration (VLSI)Layout VerificationApplication-Specific Integrated Circuits (ASIC)Place & RouteTCLLinuxSynopsys toolsMatlabRoboticsC++

About

Analog Layout Engineer with 4 years of hands-on experience in full-custom layout design across advanced nodes (2nm-5nm), including FinFET and GAA technologies. Specialized in high-speed analog blocks for HBM PHY. Proficient in Synopsys Custom Compiler and physical verification (DRC, LVS, Antenna, EM/IR), with a strong track record of delivering tape-out-ready designs. Adept at collaborating with cross-functional teams, optimizing parasitics, and ensuring signal integrity in performance-critical circuits. Currently pursuing M.Tech in Microelectronics to deepen expertise in semiconductor design.

Experience

4 yrs 2 mos
Total Experience
4 yrs 2 mos
Average Tenure
4 yrs 2 mos
Current Experience

Arf design

Analog layout design engineer

Apr 2022Present · 4 yrs 2 mos · Ranchi, Jharkhand, India · On-site

Global Distribution Systems (GDS)Layout Versus Schematic (LVS)Analog Layout DesignPhysical Design

Education

Birla Institute of Technology and Science, Pilani

Master of Technology - MTech (WILP) — Microelectronics

Jul 2024May 2026

Aryabhatta Knowledge University, Patna

Bachelor of Technology - BTech — Electrical Engineering

Sep 2018Oct 2021

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