Premraj Jadhav

Software Engineer

Thane, Maharashtra, India4 yrs 8 mos experience

Key Highlights

  • Expert in formal and functional verification of CPU architectures.
  • Hands-on experience with cutting-edge processor technologies.
  • Strong mentoring skills demonstrated through workshops and internships.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in CPU architecture and design.

Contact

LinkedIn

Skills

Core Skills

Functional VerificationFormal VerificationRtl VerificationDebuggingMentoringVerificationRtl Development

Other Skills

Computer ArchitectureX86Synopsys VC formalx86 AssemblySynopsys toolsProblem SolvingTest CasesBoard AdministrationCommunicationTeachingLogic DesignFPGA prototypingC (Programming Language)Coverage AnalysisRuby

About

I am a verification engineer at AMD with hands-on experience in formal and functional verification for Zen CPU cores. I am passionate about computer architecture, VLSI, RTL design, and FPGA development. I enjoy solving complex hardware challenges, optimizing design quality, and continuously deepening my understanding of cutting-edge processor technologies.

Experience

4 yrs 8 mos
Total Experience
2 yrs 11 mos
Average Tenure
1 yr 9 mos
Current Experience

Amd

4 roles

Silicon Design Engineer 2

Promoted

Apr 2026 – Present · 2 mos · On-site

  • Working on functional and formal verification of next generation Zen cores.
Functional VerificationFormal VerificationComputer ArchitectureDebugging

Silicon Design Engineer 1

Promoted

Dec 2024 – Mar 2026 · 1 yr 3 mos · On-site

  • Working on functional and formal verification of next generation Zen cores
DebuggingComputer ArchitectureX86Functional VerificationFormal VerificationSynopsys VC formal

CPU verification engineer (contractor)

Aug 2024 – Dec 2024 · 4 mos · On-site

Verification Co-op Intern

Jan 2024 – Jun 2024 · 5 mos · Bengaluru, Karnataka, India · On-site

  • Debugged and verified Zen 5 and Zen 6 cores.
  • Debugged 20+ failures in various parts of CPU core
  • Analysed waveforms and logs of tests to trace and resolve bugs
x86 AssemblySynopsys toolsProblem SolvingRTL VerificationComputer ArchitectureDebugging+2

Casl research group

Intern

Jun 2023 – Jul 2023 · 1 mo · Maryland, United States · Remote

RTL DevelopmentVerilogDigital LogicField-Programmable Gate Arrays (FPGA)EngineeringComputer Architecture

Society of robotics and automation, vjti

3 roles

Board Member

May 2023 – Jun 2024 · 1 yr 1 mo

MentoringBoard AdministrationCommunication

Senior core member

Promoted

Jun 2022 – May 2023 · 11 mos

  • Conducted workshops and mentored juniors in various projects and competitions
MentoringTeachingCommunication

Member

Jul 2021 – Jun 2022 · 11 mos

  • Worked and participated in many workshops | participated in eklavya mentorship program
Logic DesignFPGA prototypingC (Programming Language)

Vyoma systems

Research verification intern

Dec 2022 – Dec 2023 · 1 yr · IIT Madras Chennai · Hybrid

  • In this internship, I worked on verification of SHAKTI processor using verification tools of Vyoma systems.
Coverage AnalysisRubyRiscvComputer ArchitectureTest CasesVerification

E-yantra, iit bombay

eYSIP-2022 Intern

Jun 2022 – Jul 2022 · 1 mo · Mumbai, Maharashtra, India

Dynamic Random-Access Memory (DRAM)Computer VisionRTL DevelopmentImage ProcessingIntel Quartus PrimeVerilog+2

Education

Veermata Jijabai Technological Institute (VJTI)

Bachelor of Technology - BTech

Jan 2020 – Jan 2024

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