A

Abhishek Kumar Singh

CEO

Gorakhpur, Uttar Pradesh, India4 yrs 7 mos experience
Highly Stable

Key Highlights

  • Expert in RTL Verification and UVM methodologies.
  • Strong background in FPGA prototyping and digital design.
  • Proven experience with leading engineering teams at Qualcomm.
Stackforce AI infers this person is a VLSI Design Engineer with expertise in digital verification and FPGA technologies.

Contact

LinkedIn

Skills

Core Skills

Rtl VerificationUniversal Verification Methodology (uvm)Gate Level Simulation

Other Skills

FPGA prototypingC++VerilogCadence VirtuosoDigital ElectronicsVLSI DesignDigital System DesignEmbedded system designARM CAssembly Programming ARMXilinx Vivado IDEKeil VisionPSoC Designer.FPGA ImplementationSystemVerilog

About

I am working in the IP verification

Experience

4 yrs 7 mos
Total Experience
3 yrs 8 mos
Average Tenure
11 mos
Current Experience

Qualcomm

Lead Engineer ,DV

Jul 2025 – Present · 11 mos · Bengaluru, Karnataka, India

Synopsys inc

4 roles

Staff Engineer

Nov 2024 – Jul 2025 · 8 mos

Gate Level SimulationFPGA prototypingUniversal Verification Methodology (UVM)RTL Verification

ASIC Digital Design Engineer II

Promoted

Nov 2022 – Nov 2024 · 2 yrs

Gate Level SimulationFPGA prototypingUniversal Verification Methodology (UVM)RTL Verification

ASIC Digital Design Engineer I

Nov 2021 – Nov 2022 · 1 yr

Gate Level Simulation

ASIC Digital Design Engineer

Nov 2020 – Oct 2021 · 11 mos

Gate Level Simulation

Education

National Institute of Technology Calicut

Teaching Assistant(TA)

Jan 2019 – Jan 2020

National Institute of Technology Calicut

M.TECH — ELECTRONICS DESIGN AND TECHNOLOGY

Jan 2018 – Jan 2020

inavlid15140285

B.Tech — Electronics and Communications Engineering

Jan 2012 – Jan 2016

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