Gujjala Parameswari.. — Product Manager

->> VLSI Design & Verification Engineer has an intrest to learn and to innovate new ideas, Equally open to working and sharing responsibility with a team . Possess capability of working with a team and alone. Able to work hard and likes smart work ->> To work smart with full determination and to achieve organisational as well as personal goals ->> Area of interest - ASIC Verification , SOC Verification , RTL Design Semiconductor ->> Skills - Digital Design , Verilog , System Verilog , SVA, UVM ->> Pojects :- Router 1x3 - RTL Design & Verification , Verification of Dual - Port Ram , UART - IP Core Verification ->> I have experience of working with Industry Standards tools such as ModelSim , Questa Sim

Stackforce AI infers this person is a VLSI Design and Verification Engineer with a focus on semiconductor technologies.

Location: YSR, Andhra Pradesh, India

Experience: 3 yrs 2 mos