Garima Tomar — Software Engineer
Stackforce AI infers this person is a VLSI Design Engineer with expertise in Integrated Circuits and Layout Design.
Location: Hyderabad, Telangana, India
Experience: 2 yrs 9 mos
Skills
- Integrated Circuits (ic)
- Layout Design
Career Highlights
- Experienced in VLSI Design and Integrated Circuits.
- Proficient in Layout Design and Automation tools.
- Strong foundation in Digital and Analog Circuit Design.
Work Experience
Synopsys Inc
Standard Cells Layout Design Sr Engineer (1 yr 11 mos)
Standard Cells Layout Design Intern (2 mos)
Cadence Design Systems
Product Validation Intern (10 mos)
National Institute of Technology, Kurukshetra, Haryana
Teaching Assistant (10 mos)
Education
Master of Technology - MTech at National Institute of Technology, Kurukshetra, Haryana
Bachelor of Technology - BTech at Meerut Institute of Engineering and Technology(MIET)
