Kumar Sanu

Product Engineer

Bengaluru, Karnataka, India3 yrs 11 mos experience

Key Highlights

3.1 years of experience in ASIC digital design.
Expertise in USB3.1/3.2 verification projects.
Proficient in Universal Verification Methodology (UVM).

Stackforce AI infers this person is a Semiconductor Verification Engineer with strong expertise in digital design and verification methodologies.

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Skills

Core Skills

Universal Verification Methodology (uvm)

Other Skills

SystemVerilogC (Programming Language)C++Digital ElectronicsElectronic EngineeringDigital Integrated Circuit DesignProblem SolvingObject-Oriented Programming (OOP)

Experience

3 yrs 11 mos

Total Experience

Average Tenure

Current Experience

– Present

Synopsys inc

2 roles

ASIC Digital Design Sr. Engineer

Feb 2024 – Present · 2 yrs 4 mos · Bengaluru, Karnataka, India

Project 1 :- Worked on Verification of USB3.1/3.2 Synopsys IP with LINK ULT test environment.
Project 2 :- Worked on integration of USB3.1/3.2 LINK ULT test environment to USB3.0.

Universal Verification Methodology (UVM)

ASIC Digital Design Engineer II

Jul 2022 – Feb 2024 · 1 yr 7 mos · Bengaluru, Karnataka, India

Project 1 :- Worked on Verification of USB3.1/3.0 DBC feature regression and functional coverage in CRV based environment.
Project 2 :- Worked on USB2V2 only mode support in USB32 product to bring up HLC, STAR port regression and debug/fixes for the same.

SystemVerilogUniversal Verification Methodology (UVM)