Ashutosh Mishra — Software Engineer
Working as Memory design and compiler development engineer having 3 years of experience. Having experience in Design / Characterization / Margning of SRAM memory. Hands on experience in advance technology nodes 5nm 12nm 14nm 28nm 40nm. Good understanding of SRAM architecture , Digital circuits , single and dual port Architecture. Hands on experience in Bitcell Analysis , senseamp analysis , process entitlement , along with synopsys QA's and signoff Having debugging skills of Synopsys flow. Good understanding of Physical design and layout concepts. familarity of TCL/PERL/UNIX scripting languages. working exp on compilers like HD1P HD2P HD2PRF HSRF1P UHDPRF .
Stackforce AI infers this person is a Memory Design Engineer with expertise in SRAM architecture and physical design.
Location: Noida, Uttar Pradesh, India
Experience: 4 yrs 11 mos
Skills
- Memory Architecture
- Design And Characterization
- Physical Design
- Static Timing Analysis
Career Highlights
- Expertise in SRAM memory design and characterization.
- Hands-on experience with advanced technology nodes down to 5nm.
- Strong debugging skills in Synopsys flow.
Work Experience
Synopsys Inc
Design Engineer (3 yrs 9 mos)
Design Engineer (2 yrs 3 mos)
ACL Digital
Memory circuit design engineer (1 yr 2 mos)
PinE Training Academy of VLSI & Embedded
Physical Design Engineer (11 mos)
Mecia technology
Technical Sales Representative (2 mos)
MCM Telecom Equipment Pvt Ltd
Production Assistant (2 mos)
Fluper UAE
Search Engine Optimization Executive (4 mos)
Education
Diploma in ASIC Design-Physical Design at PinE. Training Academy
B-tech at KRISHNA ENGINERING COLLEGE, GHAZIABAD
Intermediate at Kamla Nehru Institute of Child Education
High School at Kamla Nehru Institue Of Child Education