VijayKumar Varanasi — Software Engineer

Experienced in ARC Processor IP verification and design with good knowledge on in-order RISC processor architecture. Currently working on load-store unit design and PMA design for ARC-V family of ARC processors which follow RISC-V architecture. Hands on knowledge on design skills like Linting(spyglass), synthesis and timing analysis. Technical hands on knowledge on load-store unit, multi-core coherency system, instruction execution unit, SIMD(Vector DSP), instruction fetch unit, branch prediction unit through verification at micro-architectural level. Familiar with other RISC-V concepts like PMP, Virtualization, Virtual memory systems with MMU and SMPU, Interrupts (AIA). Good knowledge on verification skills like Universal Verification Methodology (UVM), SV, SVA, C (Programming Language), Open Verification Methodology, Verilog. Hands on knowledge on Perl and Shell scripting. Hands on knowledge on developing functional coverage models, signing-off functional and code coverages.

Stackforce AI infers this person is a specialist in semiconductor design and verification within the RISC-V architecture domain.

Location: Hyderabad, Telangana, India

Experience: 14 yrs 11 mos