Shwetha C — Software Engineer
- 7+ years experience in ASIC Physical design Implementation with expertise in PnR flow. - Work on developing and refining CAD methodologies for GPU and SoC designs. Strong focus on Physical Design automation, PnR enablement, chip finishing, ECO flows, and PPA convergence. - Experienced in collaborating with PD and sign-off teams to deliver robust, well-correlated implementation flows across projects. -Worked on block level PnR Implementation and debugging of various challenges related to timing, congestion, power and runtime. -Worked on PPA optimization for the various designs across different nodes by analysis and implementing techniques to meet desired QoR goal. -Strong Engineering Background with a Bachelor of Technology in Electronics and Communication Engineering from National Institute of Technology Karnataka
Stackforce AI infers this person is a VLSI design engineer with a strong focus on ASIC and Physical Design methodologies.
Location: Bengaluru, Karnataka, India
Experience: 7 yrs 6 mos
Skills
- Physical Design
- Asic
- Radar
- Vlsi
Career Highlights
- 7+ years in ASIC Physical Design Implementation.
- Expertise in PnR flow and Physical Design automation.
- Strong focus on PPA optimization across various designs.
Work Experience
Qualcomm
Senior Engineer (2 yrs 4 mos)
Synopsys Inc
Application Engineer Sr I (1 yr)
Application Engineer II (2 yrs 4 mos)
Bharat Electronics
Deputy Engineer (1 yr 10 mos)
Education
Bachelor of Technology at National Institute of Technology Karnataka