Hemakalash M Naik

Software Engineer

Bangalore Urban, Karnataka, India3 yrs experience
Highly Stable

Key Highlights

  • Expert in A&MS layout design and digital IC design.
  • Proficient in physical verification and semiconductor engineering.
  • Strong foundation in analog circuit design and VLSI CAD.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in VLSI and Analog Circuit Design.

Contact

LinkedIn

Skills

Core Skills

A&ms Layout DesignDigital Ic DesignPhysical Verification

Other Skills

Diakopto ParagonXlayout parasitic analysisSynopsys IC ValidatorAnalog CircuitsVLSI CADLpddr6Lpddr5High speed serdes designSerDesADCDACAnalog Integrated Circuit DesignLTSpiceSemiconductor FabricationSemiconductor Engineering

Experience

3 yrs
Total Experience
3 yrs
Average Tenure
3 yrs
Current Experience

Synopsys inc

3 roles

A&MS Layout design, sr Engineer

Promoted

Feb 2025 – Present · 1 yr 4 mos

Diakopto ParagonXlayout parasitic analysisA&MS layout designDigital IC Design

A&MS Layout design engineer I

Jun 2023 – Feb 2025 · 1 yr 8 mos

Synopsys IC ValidatorPhysical VerificationA&MS layout design

A&MS layout design intern

Nov 2022 – Jun 2023 · 7 mos

Physical Verification

Epitome circuits

Analog layout design trainee

Apr 2022 – Jan 2023 · 9 mos · India

Analog CircuitsVLSI CAD

Education

BITS Pilani Work Integrated Learning Programmes

Master of Technology - MTech — VLSI Design and Microelectronics

Jul 2025 – Jul 2027

RNS Institute of Technology - India

Bachelor of Engineering - BE

Jan 2019 – Jan 2023

Alva's College, Moodabidri, Karnataka

PU — PCMB

Vidyaniketan Public School - India

10th

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