S

Sandeep Kumar Avula

Software Engineer

Bengaluru, Karnataka, India4 yrs 7 mos experience

Key Highlights

  • 4+ years of experience in design verification.
  • Expert in LPDDR5 and DDR5 verification.
  • Proficient in System Verilog and UVM methodologies.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in functional verification and simulation methodologies.

Contact

LinkedIn

Skills

Core Skills

Functional VerificationGate Level Simulation

Other Skills

Coverage AnalysisAssertionsVery-Large-Scale Integration (VLSI)Problem SolvingSVCode CoverageHVLUniversal Verification Methodology (UVM)DDRDigital DesignsDebuggingInterpersonal CommunicationSystemVerilogVerilogDigital Electronics

About

Design Verification Engineer with 4+ years of experience in verifying LPDDR5 and DDR5 using System Verilog (UVM). Experienced in gate-level simulations(Zero Delay and SDF) and functional verification.

Experience

4 yrs 7 mos
Total Experience
--
Average Tenure
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Current Experience

Mirafra technologies

Senior Verification Engineer

May 2025 – Present · 1 yr 1 mo · Bengaluru, Karnataka, India

Tech mahindra cerium pvt ltd

2 roles

Engineer

Promoted

Apr 2023 – May 2025 · 2 yrs 1 mo · Bengaluru, Karnataka, India

  • Working on Functional Verification and Gate Level Simulations of LPDDR5 and DDR5
Coverage AnalysisAssertionsFunctional VerificationGate Level Simulation

Associate Engineer

Mar 2022 – Mar 2023 · 1 yr · Bengaluru, Karnataka, India

  • Associated with the project on LPDDR5 with Functional Verification

Accenture

Application Development Associate

Oct 2021 – Mar 2022 · 5 mos · Bengaluru, Karnataka, India

Education

JNTUA College of Engineering, Kalikiri

Bachelor of Technology - BTech — Electronics and Communications Engineering

Jun 2017 – Jul 2021

Narayana Junior College Narasimha konda

Intermediate — M.P.C

Jun 2015 – Mar 2017

Ravindra Bharathi School

SSC

Jun 2014 – Apr 2015

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