Karthik Komati

Software Engineer

Bengaluru, Karnataka, India8 yrs 9 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in DFT methodologies and tools.
  • Proficient in C, C++, Verilog, and scripting languages.
  • Hands-on experience with leading semiconductor validation tools.
Stackforce AI infers this person is a Semiconductor Validation Engineer with expertise in DFT and post-silicon testing.

Contact

Skills

Core Skills

DftSemiconductorsPost Silicon Validation

Other Skills

SCANBSCANScan InsertionScan compressionScan DRCATPGSimulationC++ATE verigy 93000iNSIGHT BillingCoverage AnalysisCommunicationTestingElectronicsVery-Large-Scale Integration (VLSI)

About

Senior DFT Engineer at Mediatek, Bangalore To develop my career in DFT and where I will be a valuable team member contributing quality ideas and work for the organization where there is an ample scope for me as well as organization's growth. I am graduated from Rajeev Gandhi University of Knowledge technologies, APIIIT, RK Valley. Currently working as a Senior DFT engineer at Mediatek. I have strong knowledge on SCAN, BSCAN, Scan Insertion, Scan compression, Scan DRC, ATPG and Simulation. I also know C, C++, Verilog languages and TCL, perl scripting. Hands on experience with Synapsis DC compiler, TetraMax, Tessent TK, VCS and Agilent verigy 93K hardware tool.

Experience

8 yrs 9 mos
Total Experience
4 yrs 4 mos
Average Tenure
6 yrs 8 mos
Current Experience

Mediatek

2 roles

Senior DFT Engineer

Promoted

Aug 2021Present · 4 yrs 9 mos · Bengaluru, Karnataka, India

DFTSCANBSCANScan InsertionScan compressionScan DRC+3

DFT Engineer

Aug 2019Jul 2021 · 1 yr 11 mos · Bengaluru, Karnataka, India

Tessolve

Post Silicon Validation

Jul 2017Aug 2019 · 2 yrs 1 mo · Bengaluru Area, India

  • Roles & Responsibilities:
  • Develop, implement and debug test case to be used for operation and validation of internal design of SOCs.
  • Hands on experience in writing test cases for post silicon validation at wafer and packaged IC level using C++ on ATE verigy 93000.
C++ATE verigy 93000Post Silicon Validation

Education

RAJIV GANDHI UNIVERSITY OF KNOWLEDGE TECHNOLOGIES, RK VALLEY

Bachelor of Technology - BTech — Electronics and Communications Engineering

Jan 2013Jan 2017

RAJIV GANDHI UNIVERSITY OF KNOWLEDGE TECHNOLOGIES, RK VALLEY

Intermediate

Jan 2011Jan 2013

ZPHS Mangalagudem

Matriculation — SSC

Jan 2010Jan 2011

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