M

MD SADIQUE EQUBAL

Software Engineer

Gaya, Bihar, India2 yrs 4 mos experience
Most Likely To Switch

Key Highlights

  • Expertise in DIGITAL VLSI DESIGN and Static Timing Analysis.
  • Hands-on experience with Xilinx Vivado and Cadence Virtuoso.
  • Strong foundation in Electrical Engineering from IIT Patna.
Stackforce AI infers this person is a VLSI design engineer with expertise in digital systems.

Contact

LinkedIn

Skills

Core Skills

Digital Vlsi DesignStatic Timing Analysis

Other Skills

Xilinx VivadoCadence VirtuosoC (Programming Language)ARM ArchitectureVerilog

Experience

2 yrs 4 mos
Total Experience
1 yr 2 mos
Average Tenure
1 yr 6 mos
Current Experience

Ntpc limited

Executive Engineer

Dec 2024 – Present · 1 yr 6 mos · Ramagundam, Telangana, India · On-site

Xilinx VivadoCadence VirtuosoStatic Timing AnalysisDIGITAL VLSI DESIGN

Intel corporation

Graduate Technical Intern

Jun 2024 – Dec 2024 · 6 mos · Bengaluru, Karnataka, India · On-site

Indian institute of technology, patna

Teaching Assistant

Aug 2023 – Jun 2024 · 10 mos · Patna, Bihar, India · On-site

  • Taught different subjects of Electrical Engineering

Education

Indian Institute of Technology, Patna

Mtech — VLSI and Embedded system

Jul 2023 – May 2025

Jamia Millia Islamia

Bachelor of Technology - BTech — ECE

Aug 2016 – Sep 2020

Jamia Millia Islamia

Jan 2016 – Jan 2020

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