Sasikumar Gnanamuthu

Software Engineer

Santa Clara, California, United States7 yrs experience

Highly Stable

Key Highlights

Experienced in DFT and SoC design methodologies.
Proficient in Automatic Test Pattern Generation techniques.
Strong debugging skills in complex electronic systems.

Stackforce AI infers this person is a DFT specialist in the semiconductor industry.

Contact

Skills

Core Skills

DftSystem On A Chip (soc)

Other Skills

Scan InsertionAutomatic Test Pattern Generation (ATPG)Boundary ScanGate Level SimulationDebuggingmbistCEmbedded SystemsManagementProblem SolvingJoint Test Action Group (JTAG)Virtual Network Computing (VNC)Formal VerificationStatic Timing AnalysisLogic Synthesis

Experience

7 yrs

Total Experience

2 yrs 2 mos

Average Tenure

--

Current Experience

Qualcomm

4 roles

Staff Engineer

Jun 2025 – Present · 1 yr

Staff Engineer

Nov 2024 – Jun 2025 · 7 mos

Senior Engineer

Sep 2023 – Nov 2024 · 1 yr 2 mos

Scan InsertionAutomatic Test Pattern Generation (ATPG)Boundary ScanDFTGate Level SimulationSystem on a Chip (SoC)

DFT Engineer (Contractor)

Jan 2022 – Jan 2024 · 2 yrs

Automatic Test Pattern Generation (ATPG)DFTDebuggingSystem on a Chip (SoC)

Mediatek

DFT Engineer (Contractor)

Apr 2020 – Dec 2021 · 1 yr 8 mos · Bengaluru, Karnataka, India

Automatic Test Pattern Generation (ATPG)DFTDebugging

Tessolve

DFT Engineer

Feb 2020 – Jan 2024 · 3 yrs 11 mos · Bengaluru, Karnataka, India

Automatic Test Pattern Generation (ATPG)DFTmbistDebuggingSystem on a Chip (SoC)

Harman international

DFT Engineer (Contractor)

Aug 2019 – Jan 2020 · 5 mos · Seoul, South Korea

Automatic Test Pattern Generation (ATPG)DFTDebuggingSystem on a Chip (SoC)

Test and verification solutions

DFT Engineer

Jan 2017 – Feb 2020 · 3 yrs 1 mo · Chennai Area, India

Automatic Test Pattern Generation (ATPG)DFTmbistDebuggingSystem on a Chip (SoC)

Education

ACET

Bachelor's degree

Jan 2013 – Jan 2017

Stackforce found 100+ more professionals with Dft & System On A Chip (soc)

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