Rishabh S Vasisht

Software Engineer

Bengaluru, Karnataka, India7 yrs 8 mos experience

Key Highlights

Expert in Functional and Formal Verification methodologies.
Hands-on experience with Xilinx Vivado tool and FPGA designs.
Strong interpersonal and communication skills in technical environments.

Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in Functional and Formal Verification.

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Skills

Core Skills

Semiconductor EngineeringFunctional VerificationIp VerificationMicroarchitectureFormal VerificationHardware Verification

Other Skills

Test CasesWritten CommunicationFormal MethodsTest EnvironmentsTest PlanningInterpersonal SkillsAssertionsAMBA AHBCode CoverageOral CommunicationCache CoherencyAMBAXilinx VivadoSystem VerilogProblem Solving

Experience

7 yrs 8 mos

Total Experience

1 yr 8 mos

Average Tenure

1 yr 1 mo

Current Experience

Mediatek

Staff Engineer

May 2025 – Present · 1 yr 1 mo · Bengaluru, Karnataka, India

Mirafra technologies

Verification Engineer

Jun 2024 – Oct 2025 · 1 yr 4 mos · Bengaluru · Hybrid

Semiconductor EngineeringFunctional Verification

Google

Sub-System Verification Engineer || Google || Consultant

Jun 2024 – Oct 2025 · 1 yr 4 mos · Bengaluru, Karnataka, India · Hybrid

Amd

IP Verification Engineer

Aug 2021 – Jun 2024 · 2 yrs 10 mos · Bengaluru, Karnataka, India

Test CasesWritten CommunicationSemiconductor EngineeringFormal MethodsTest EnvironmentsTest Planning+7

Singularity dynamics pvt ltd

CPU Verification Engineer

Oct 2019 – Aug 2021 · 1 yr 10 mos · Bangalore

MicroarchitectureSemiconductor EngineeringFormal MethodsInterpersonal SkillsAssertionsCache Coherency+3

Xilinx

Graduate Technical Intern

Aug 2018 – Aug 2019 · 1 yr · Hyderabad, Telangana, India

Worked as an intern in the Lab tools team and was a part of two releases of Xilinx Vivado (2018.3, 2019.1 and 2019.2) and exposure to Vivado tool and tool flow.  Analysis of regressions with different design IP to optimize the tool functionality.  Flash validation of SPI and BPI based flashes of different densities on AFX boards (SoC and MPSoC).  Created Partial Reconfigurable block designs with different debug IPs.  Trained and hands-on experience on System Verilog.  Designed a Multiple Debug Network with different debug IPs as reconfigurable modules.  Creation of FSBL for Zynq and ZynqMPSoC to configure the FPGA with hardware bitstream.  Validating the debug cores( ILA and VIO) implemented on Versal chip( based on 7nm technology) with designs of different probe densities.  Validated the tool for both hardware and software compatibility on multiple Operating Systems (RHEL, Ubuntu, openSUSE and Windows).  Robust tested and validated the hardware support with vigorous corner cases to crash the tool to find real time issues of the tool.

Hardware VerificationSemiconductor EngineeringInterpersonal Skills