Saksham Gupta — Software Engineer

• Physical Design Engineer - NPU (AI/ML) chipsets for the Snapdragon Mobile Platform, compute and automotive chips. • Execute floorplan and place & route for high logic density, multi-power domain designs across advanced process nodes including N2 GAA, SF2 GAA, N3E and N4. • Successfully taped out multiple projects with focus on achieving static timing closure and congestion optimization for complex low-power SoC designs. • Extensive hands-on experience with industry-standard tools including Innovus, Fusion Compiler, and PrimeTime. • Good understanding of clock tree synthesis to minimize skew & insertion delay and implementing effective ECO techniques along with resolving noise and crosstalk issues. • Knowledge of signoff checks including Static Timing Analysis, Physical Verification, EMIR analysis, Formal Verification, and Conformal Low Power checks.

Stackforce AI infers this person is a Physical Design Engineer specializing in AI/ML chipsets within the semiconductor industry.

Location: New Delhi, Delhi, India

Experience: 6 yrs 5 mos