Savitha Honaganahalli — CEO

• Team oriented Project Engineer with 2 years and 6 months of experience in SoC Verification. Areas of expertise include sound knowledge of AMBA protocol and ARM based SoC. • Skilled Verification Engineer with 3 years of experience in AHB/AXI based platform development and verification. Areas of expertise include emulation platforms and automation. • Have developed A-class, R-class and M-class CPU based platforms and have booted linux, RTLinux and uCLinux respectively on those platforms • Highly motivated and innovative Senior Verification Engineer with 2 years and 2 months of experience on mobile platform automation and verification on emulation platforms. • Senior Engineer working on latest Graphics processors on emulation platforms in ARM Ltd. Cambridge since May 2013 till Nov 2017. • Project Manager Secondee working on defining and rolling out a process for requesting application engineer and technical communication developer for various projects in ARM as part of Application Engineering Strategy Project • Staff Engineer holding multiple roles such as Project manager, Scrum Master, Jira project and portfolio specialist and on technical front driving cross-site activity from Nov 2017 till Oct 2019 • Staff Engineer holding team lead responsibility for Media IP (Mali GPU, Mali DPU, Mali ISP) based platform development and integration test development – Oct 2019 till date • In-depth VHDL and Verilog knowledge • Trained on UVM, System Verilog, SystemC and Python • Good at scripting languages – Python, Perl, Tcl and shell • Experience running on emulation platforms from leading EDA vendors - Cadence Palladium PXP/PXP2 and Z1, Mentor Veloce and Synopsys ZeBu Server • Have mentored interns and graduate engineers and have held line manager responsibilities.

Stackforce AI infers this person is a Semiconductor Architect with extensive experience in verification and platform development.

Location: Bengaluru, Karnataka, India

Experience: 20 yrs 6 mos

Career Highlights

Over 20 years of experience in semiconductor industry.
Expertise in ARM-based SoC and verification methodologies.
Led cross-site teams for timely project deliveries.

Work Experience

Intel Corporation

Silicon Architecture Manager (2 yrs 6 mos)

Silicon Architecture Engineer (2 yrs 2 mos)

Arm

Staff Engineer (2 yrs)

Staff Engineer (1 yr 5 mos)

Project Manager Secondee (5 mos)

Senior Engineer (4 yrs 6 mos)

Senior Verification Engineer (10 mos)

Verification Engineer (4 yrs 3 mos)

Wipro Technologies

Project Engineer (2 yrs 6 mos)

Education

Bachelor of Engineering (BE) at Visvesvaraya Technological University

Pre University at First Grade College

Savitha Honaganahalli

CEO

Bengaluru, Karnataka, India20 yrs 6 mos experience

Highly Stable

Key Highlights

Over 20 years of experience in semiconductor industry.
Expertise in ARM-based SoC and verification methodologies.
Led cross-site teams for timely project deliveries.

Stackforce AI infers this person is a Semiconductor Architect with extensive experience in verification and platform development.

Contact

Skills

Other Skills

SystemVerilogFunctional VerificationARMASICVerilogSoCDebuggingVLSIFormal VerificationStatic Timing AnalysisRTL designTCLNCSimModelSimFPGA

About

Experience

20 yrs 6 mos

Total Experience

7 yrs 11 mos

Average Tenure

4 yrs 7 mos

Current Experience

Intel corporation

2 roles

Silicon Architecture Manager

Promoted

Nov 2023 – Present · 2 yrs 6 mos

Silicon Architecture Engineer

Oct 2021 – Dec 2023 · 2 yrs 2 mos

Arm

6 roles

Staff Engineer

Oct 2019 – Oct 2021 · 2 yrs

Worked as Team lead responsible for developing platforms with GPU, Display processors, Image signal processors. The team was also responsible for developing integration tests which goes as a deliverable to external customers.

Staff Engineer

Promoted

Apr 2018 – Sep 2019 · 1 yr 5 mos

Held multiple roles such as Project manager, Scrum Master, Jira project and Jira portfolio specialist. On technical front was responsible for driving cross-site activity involving teams in Bangalore and Cambridge to get the GPU and display integration tests on time for GPU and Display releases. Was also responsible in sign-off of the integration tests.

Project Manager Secondee

Nov 2017 – Apr 2018 · 5 mos

Worked on creating a new project lifecycle for first time in partner enablement group, setup a process for managing and maintaining DesignReview Checklists for customer SoC's, and gain some data analytics experience during the secondment

Senior Engineer

Promoted

May 2013 – Nov 2017 · 4 yrs 6 mos

Worked with Mentor FAE to port System Verilog Assertions on Veloce Emulator which eased debugging complex content on GPUs. Also developed a testbench to replay FPGA buslogs on Emulator which eased debug of test failures or hangs observed in the FPGA runs.

Senior Verification Engineer

Jan 2012 – Nov 2012 · 10 mos

Developed framework to integrate Systems and Subsystems using Duolog tools using IPXACT-1.4 standard. This helped us spend more time on testing different configurations of the IPs at system level with less effort on integration.

Verification Engineer

Sep 2007 – Dec 2011 · 4 yrs 3 mos

Developed Cortex-A/R/M based platforms for system validation and booted OS on them. Worked on ZeBu Server evaluation with EDA vendors. Investigated the different tools (AMBADesigner, Synopsys CoreAssembler and Duolog Weaver) for automating the system generation

Wipro technologies

Project Engineer

Mar 2005 – Sep 2007 · 2 yrs 6 mos

Involved in verification of APB and AHB peripherals. Also had developed a verilog based test bench for supporting BCH algorithm for Nand Flash Controller.