Sharad Khot

Software Engineer

Bengaluru, Karnataka, India1 yr 4 mos experience

Key Highlights

Expert in Physical Design and Static Timing Analysis.
Hands-on experience with SOC design in 40nm technology.
Proficient in various EDA tools and methodologies.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Physical Design and VLSI methodologies.

Contact

Skills

Core Skills

Digital Circuit DesignPhysical Design

Other Skills

Layout Versus Schematic (LVS)Static Timing AnalysisFloor-planningPowerplaningPlacementClock Tree SynthesisRoutingLayout VerificationCadence VirtuosoTime ConstraintsICCSynopsys PrimetimeSynopsys IC CompilerEDACMOS

Experience

1 yr 4 mos

Total Experience

1 yr 4 mos

Average Tenure

1 yr 4 mos

Current Experience

Intel

Physical Design Engineer

Jan 2025 – Present · 1 yr 4 mos · Bengaluru, Karnataka, India

Layout Versus Schematic (LVS)Digital Circuit Design

Rv skills design centre

Physical Design Trainee

Nov 2023 – May 2024 · 6 mos · jayanagar,bengluru · On-site

Design of a SOC physical design block that can be integrated into a full chip. Overview: 40nm
design,Knowledge in ASIC PD (APR) flow involving Floor-planning,Powerplaning, Placement, Clock Tree Synthesis,Routing and STA.

Physical DesignStatic Timing Analysis