Srinivas S

CEO

Bengaluru, Karnataka, India15 yrs 1 mo experience
Highly Stable

Key Highlights

  • Expertise in ASIC backend design and physical design.
  • Hands-on experience with multiple technology nodes.
  • Proficient in Synopsys flows and TCL scripting.
Stackforce AI infers this person is a VLSI design engineer with extensive experience in ASIC development.

Contact

Skills

Core Skills

AsicPhysical DesignMicroprocessors

Other Skills

Graphics Processormicroprocessor14nm technologyTCL scriptsVerilogSimulationAldec Riviera PROXilinx ISEModelsimVHDLXilinx SpartanXilinx VirtexFloorplanningPlace & RouteSynopsys tools

About

• Experience in ASIC backend design from Synthesis to GDS with expertise in placement, CTS, STA, timing convergence, DRC clean up. • Worked on multiple technology nodes - 14nm, 40nm, 65nm, 90nm, etc. • Proficient in Synopsys flows and experience in flat & hierarchy designs. • Efficient in floorplanning, IR drop, signals integrity analysis. • Worked on server chip, multicore graphic processor, quadcore cpu microprocessor, DMA Controller, FIFO and SIM Card Controller modules.

Experience

15 yrs 1 mo
Total Experience
3 yrs 5 mos
Average Tenure
1 yr 5 mos
Current Experience

Astera labs

Principle Engineer

Jan 2025Present · 1 yr 5 mos · Bengaluru, Karnataka, India

Mediatek

Senior Staff Engineer

Sep 2017Jan 2025 · 7 yrs 4 mos · Bengaluru, Karnataka, India

Synapse design inc.

Module Lead

May 2016Sep 2017 · 1 yr 4 mos · Bengaluru, Karnataka, India

Ust global

2 roles

Technical Analyst

Nov 2015Apr 2016 · 5 mos

Sr. Product Development Engineer

Sep 2014Nov 2015 · 1 yr 2 mos

Tata consultancy services

2 roles

Systems Engineer

Promoted

Mar 2013Aug 2014 · 1 yr 5 mos

  • Worked on Physical design of Graphics Processor, microprocessor. Also have hands-on implementation on 14nm tech with complete ownership of 4 partitions working with semiconductor major clients. Also, performed full chip scan chain checks, gate to gate FV checks and wrote TCL scripts to enhance the reports generated from the flows.
Physical designGraphics Processormicroprocessor14nm technologyTCL scriptsASIC+1

Assistant System Engineer

Mar 2011Mar 2013 · 2 yrs

  • ~ Designed and implemented 8237 DMA Controller IP and SIM Card Controller modules using Verilog and performed the simulation on the same. Tools used were Aldec Riviera PRO, Xilinx ISE and Modelsim.
  • ~ Got trained and received certifications from Synopsys on IC Compiler, Design Compiler and Primetime.
  • ~ Started on a physical design project on microprocessor core.
VerilogSimulationAldec Riviera PROXilinx ISEModelsimMicroprocessors+1

Indian space research organization

Project Trainee at Control Systems Group, ISAC

Feb 2010May 2010 · 3 mos

  • ~ Project: Sensor and Actuator Simulation for AOCE
  • ~ Workplace: Implementation: VHDL
  • ~ Tools: Xilinx Spartan & Virtex
  • ~ Description: AOCS (Attitude & Orbit Control System) is an onboard system in satellite primarily used to move the satellite back to the orbit when external forces cause it to drift off station. The work involves interfacing a PCI controller to FPGA package and then writing the VHDL code for sensors and actuator simulation.
  • ~ Language used: VHDL
  • ~ Platform used: Linux, Windows
VHDLXilinx SpartanXilinx Virtex

Education

Visvesvaraya Technological University

Bachelor of Engineering — Electronics & communication

Jan 2006Jan 2010

Sri Kumaran Children's Home Composite Junior College, Karnataka State Board

XII-PUC

Jan 2004Jan 2006

Jyothy Kendriya Vidyalaya, Central Board (CBSE)

Schooling

Jan 2000Jan 2004

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