Srinivas S — CEO
• Experience in ASIC backend design from Synthesis to GDS with expertise in placement, CTS, STA, timing convergence, DRC clean up. • Worked on multiple technology nodes - 14nm, 40nm, 65nm, 90nm, etc. • Proficient in Synopsys flows and experience in flat & hierarchy designs. • Efficient in floorplanning, IR drop, signals integrity analysis. • Worked on server chip, multicore graphic processor, quadcore cpu microprocessor, DMA Controller, FIFO and SIM Card Controller modules.
Stackforce AI infers this person is a VLSI design engineer with extensive experience in ASIC development.
Location: Bengaluru, Karnataka, India
Experience: 15 yrs 1 mo
Skills
- Asic
- Physical Design
- Microprocessors
Career Highlights
- Expertise in ASIC backend design and physical design.
- Hands-on experience with multiple technology nodes.
- Proficient in Synopsys flows and TCL scripting.
Work Experience
Astera Labs
Principle Engineer (1 yr 5 mos)
MediaTek
Senior Staff Engineer (7 yrs 4 mos)
Synapse Design Inc.
Module Lead (1 yr 4 mos)
UST Global
Technical Analyst (5 mos)
Sr. Product Development Engineer (1 yr 2 mos)
Tata Consultancy Services
Systems Engineer (1 yr 5 mos)
Assistant System Engineer (2 yrs)
Indian Space Research Organization
Project Trainee at Control Systems Group, ISAC (3 mos)
Education
Bachelor of Engineering at Visvesvaraya Technological University
XII-PUC at Sri Kumaran Children's Home Composite Junior College, Karnataka State Board
Schooling at Jyothy Kendriya Vidyalaya, Central Board (CBSE)