stanley Joseph

Software Engineer

Bengaluru, Karnataka, India6 yrs 11 mos experience

Highly Stable

Key Highlights

Expert in Design for Test methodologies.
Proficient in DFT and ATPG techniques.
Strong background in Coverage Analysis and Simulations.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in DFT and test methodologies.

Contact

Skills

Core Skills

DftTest EngineeringCoverage AnalysisSimulations

Other Skills

Automatic Test Pattern Generation (ATPG)System on a Chip (SoC)SOCCompilationTiming simulationsDigital ElectronicsVery-Large-Scale Integration (VLSI)DebuggingLinuxPerlPython (Programming Language)Xilinx ISESVARTL CodingCode Coverage

About

Expertised in Design for Test

Experience

6 yrs 11 mos

Total Experience

2 yrs 4 mos

Average Tenure

2 yrs 3 mos

Current Experience

Amd

Senior Silicon Design Engineer

Feb 2024 – Present · 2 yrs 3 mos · Bengaluru, Karnataka, India · On-site

DFTAutomatic Test Pattern Generation (ATPG)Test Engineering

Tessolve

Silicon design engineer 2

Feb 2020 – Mar 2024 · 4 yrs 1 mo · Bangalore Urban, Karnataka, India

Coverage AnalysisSimulations

Test and verification solutions

DFT -DV Engineer

Jun 2019 – Feb 2020 · 8 mos · Greater Chennai Area

Maven silicon

Design Verification Intern

Oct 2018 – May 2019 · 7 mos · Bangalore Urban, Karnataka, India

Education

G.pullareddy engineering college

Bachelor of Technology (B.Tech.) — Electrical and Electronics Engineering

Jan 2013 – Jan 2017

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