Sanmati Jain — Software Engineer

VLSI-DFT Engineer with experience of handling various DFT/DFD activities in multiple projects DFT:  Strong fundamental knowledge of DFT concepts . Scan insertion , MBIST, BIRA ,BiSR  ATPG for stuck-at, Transition, IDDQ with Tetramax/ Encounter Test  DRC analysis, Coverage analysis and improvement  Pattern Simulation with and without timing annotation & debugging simulation mismatches (VCS/NCSim)  Hands-on experience in ATE level pattern bring-up. Debug experience of ATE pattern failures  Knowledge of JTAG, MBIST, Scan Compression techniques.  Basic understanding of Tester requirements, basics of synthesis and timing. Knowledge of formal verification. Exposure to both SoC/block level DFT.  Shell, tcl & Perl scripting DFD:  Verification and bring-up of design for debug feature.

Stackforce AI infers this person is a DFT Engineer specializing in semiconductor testing and verification.

Location: Maharashtra, India

Experience: 12 yrs 11 mos