Gowtham Gowda L — Software Engineer
Trained DFT Engineer from ChipEdge Technologies Pvt Ltd. • DFT (DESIGN FOR TEST/TESTING/TESTABILITY) • Scan concepts • ATPG tasks, pattern generation, Simulation (both pre-sim & post-sim) i.e., timing & no-timing simulations. • Tool used in Course:- Tessent EDT tool knowledge, Synopsys Tool (DC Compiler, TetraMax, VCS). • Cadence tool and Xilinx tool :- Basics • Digital Electronics, Logic Design, Testing, Test Execution, CMOS Fundamentals, Linux - Essentials of Linux.
Stackforce AI infers this person is a DFT Engineer with expertise in VLSI and ASIC testing.
Location: Bengaluru, Karnataka, India
Experience: 2 yrs 2 mos
Skills
- Dft
- Testing
Career Highlights
- Proficient in DFT methodologies and tools.
- Hands-on experience with Synopsys and Cadence software.
- Strong foundation in digital electronics and testing.
Work Experience
Insemi Technology Services Pvt. Ltd.
DFT Engineer (1 yr 7 mos)
MediaTek
DFT Engineer (7 mos)
Education
Bachelor of Engineering - BE at Don Bosco Institute Of Technology
Design For Test at ChipEdge Technologies Pvt Ltd
at MediaTek
at MediaTek ChipEdge Technologies Pvt Ltd
Diploma at PVP Polytechnic
SSLC at St. Flowers High School
at MediaTek
ChipEdge Technologies Pvt Ltd at MediaTek
at ChipEdge Technologies Pvt Ltd
