Vinayak Hiremath

Software Engineer

Bengaluru, Karnataka, India11 yrs 8 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in RTL Design and System Verilog.
  • Experience with FPGA and Functional Verification.
  • Strong background in VLSI Design and Verification.
Stackforce AI infers this person is a VLSI Design Engineer with expertise in FPGA and RTL development.

Contact

Skills

Core Skills

Rtl DesignSystem Verilog

Other Skills

10G EthernetAltera Compliant soft IP creationAltera QuartusBFM VerificationCFPGAFunctional VerificationHFTLeonardo SpectrumMicrosoft OfficeModelSimNIOS based System ValidationPhotoshopPowerPointSTA

Experience

Intel corporation

IP Logic Design Engineer

Jun 2022Present · 3 yrs 9 mos · Bengaluru, Karnataka, India

Samsung semiconductor india

2 roles

Staff Engineer

Promoted

Mar 2021Jun 2022 · 1 yr 3 mos

Associate Staff Engineer

May 2018Feb 2021 · 2 yrs 9 mos

Mindlance technologies

Design Engineer II

Jun 2017May 2018 · 11 mos · Bengaluru, Karnataka, India

Celerix technologies

Design Engineer

Jun 2014May 2017 · 2 yrs 11 mos · Bengaluru Area, India

  • RTL Design, System Verilog HDL Coding, BFM Verification, Altera Compliant soft IP creation, STA, NIOS based System Validation, HFT, 10G Ethernet
RTL DesignSystem Verilog HDL CodingBFM VerificationAltera Compliant soft IP creationSTANIOS based System Validation+3

Education

G M Institute of Technology, Davangere

Bachelor's Degree — Electronics and Communications Engineering

Jan 2009Jan 2013

Sandeepani School of Embedded & VLSI Design

VLSI Frontend Design & Verification

Jan 2013Jan 2014

M K K H S, Chikodi

Jan 1997Jan 2007

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Vinayak Hiremath - Software Engineer | Stackforce