Krishna Tejwani

CTO

Ahmedabad, Gujarat, India8 yrs 4 mos experience

Key Highlights

Experienced in System on a Chip (SoC) development.
Strong leadership skills in technical teams.
Proficient in Functional Verification methodologies.

Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in VLSI and SoC design.

Contact

tejwanikrishna@gmail.com LinkedIn

Skills

Core Skills

System On A Chip (soc)LeadershipSystem VerilogFunctional Verification

Other Skills

C++DebuggingI2CLinuxPerlPythonTeam BuildingUniversal Verification Methodology (UVM)Very-Large-Scale Integration (VLSI)

Experience

Eximietas design

Technical Lead

Nov 2025 – Present · 4 mos · Ahmedabad, Gujarat, India · On-site

Infineon technologies

2 roles

Senior Staff Engineer

Promoted

May 2024 – Oct 2025 · 1 yr 5 mos · Ahmedabad, Gujarat, India · On-site

System on a Chip (SoC)LeadershipFunctional VerificationTeam BuildingUniversal Verification Methodology (UVM)

Staff Engineer

Dec 2023 – Apr 2024 · 4 mos · Ahmedabad, Gujarat, India · On-site

System VerilogUniversal Verification Methodology (UVM)I2CDebuggingSystem on a Chip (SoC)Functional Verification

Gan systems inc.

Senior Verification Engineer

Aug 2022 – Dec 2023 · 1 yr 4 mos · Vadodara, Gujarat, India · On-site

Worked with NebMicro, which was acquired by GaN Systems in 2022 and later integrated into Infineon Technologies in 2023. Continued in the same role through both transitions, contributing to product development and innovation within evolving organizational structures.

System VerilogUniversal Verification Methodology (UVM)I2CDebuggingFunctional Verification

Nebula microsystems inc.

Senior Verification Engineer

Dec 2021 – Aug 2022 · 8 mos · Vadodara · On-site

System VerilogUniversal Verification Methodology (UVM)I2CDebuggingSystem on a Chip (SoC)Functional Verification

Einfochips (an arrow company)

3 roles

Senior ASIC Verification Engineer (Level 1)

Apr 2021 – Dec 2021 · 8 mos

System VerilogUniversal Verification Methodology (UVM)DebuggingSystem on a Chip (SoC)Functional Verification

ASIC Verification Engineer

Feb 2019 – Apr 2021 · 2 yrs 2 mos

System VerilogUniversal Verification Methodology (UVM)DebuggingSystem on a Chip (SoC)Functional Verification

Trainee ASIC Verification Engineer

Aug 2018 – Feb 2019 · 6 mos

System VerilogUniversal Verification Methodology (UVM)I2CDebuggingFunctional Verification

Eitra - einfochips training & research academy ltd

Trainee

Jan 2018 – Jul 2018 · 6 mos · Ahmedabad Area, India · On-site

Training on Linux, Perl, Verilog, System Verilog and UVM.

Artem

Summer Intern

May 2017 – Jul 2017 · 2 mos · Ahmedabad Area, India · On-site

Designing of Battery Management System for E-bikes.

Nirma university

Member, UGV Research Team, Nirma University

Dec 2016 – May 2017 · 5 mos · Ahmedabad Area, India · On-site

Fairdeal power control

Summer Intern

Jun 2016 – Jul 2016 · 1 mo · Ahmedabad Area, India · On-site

PCB Designing, Verification and Testing.

Micromax mobile

Trainee

Jun 2015 – Jul 2015 · 1 mo · Ahmedabad Area, India · On-site

Quality control

Fairdeal power control

Trainee

Dec 2014 – Jan 2015 · 1 mo · Ahmedabad Area, India · On-site

Quality control, Testing, Production, and PCB designing

Education

Nirma University

Bachelor of Technology (B.Tech.) — Electronics and Communications Engineering

Jan 2015 – Jan 2018

Nirma University

Diploma — Electronics and Communications Engineering

Jan 2012 – Jan 2015

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