Yogissh C. — CEO
I help semiconductor companies deliver first-pass silicon success by combining 21+ years of deep expertise in SoC, ASIC, Structured ASIC, and FPGA verification with a proven track record of building and leading global, cross-functional teams. 🔹 Over my career, I’ve: - Built and scaled multi-location verification organizations, leading 40+ engineers across geographies. - Delivered tape-out success for multiple SoCs and IPs by driving cross-functional collaboration between design, architecture, verification, and validation teams. - Established Centers of Excellence (CoEs) and Offshore Development Centers (ODCs), improving delivery efficiency and client confidence. - Partnered with clients in pre-sales, proposals, and RFP/RFQ responses, blending technical depth with business development impact. 🔹 SoC, ASIC & FPGA Design & Verification Expertise - End-to-end experience in SoC/ASIC/FPGA design verification lifecycle from planning, testbench architecture, methodology setup, and IP & verification IP (VIP) selection & development to sign-off and tape-out. - SoC including all types of processors including ARM-based, RISC-V and Intel based. - Carried out the comparison and evals for inhouse and 3rd party IPs for the SoC design architecture. 🔹 Technical Expertise: SoC/ASIC/FPGA verification, PCIe (Gen1–3), MIPI, SATA, UFS2.0, I2C, SPI, PIPE | UVM/OVM | SystemVerilog, Verilog, VHDL | Synopsys, Cadence, Mentor tools. 🔹 Recognition: Speaker at PCI-SIG and MIPI Alliance (MWC Barcelona) | Published in Verification Horizon | White Paper Author | Customer Appreciation Awards. 🔹 My edge: I don’t just verify designs, I build teams, processes, and trust across the cross-functional teams that ensure complex SoC projects are delivered on-time, with quality, and aligned to business goals.
Stackforce AI infers this person is a Semiconductor Verification Expert with extensive experience in SoC and ASIC design.
Location: Penang, Malaysia
Experience: 22 yrs 6 mos
Skills
- Soc/asic/fpga Verification
- Team Management
- Ip Verification
- Mipi Vip Development
- Customer Engagement
- Pcie Qvip Development
- Soc Verification
Career Highlights
- 21+ years of expertise in semiconductor verification.
- Led global teams of 40+ engineers across multiple locations.
- Established Centers of Excellence to enhance delivery efficiency.
Work Experience
Altera
Sr. Manager, DV - SoC Lead (1 yr 2 mos)
Intel Corporation
Sr. Manager, DV - SoC Lead (3 yrs 4 mos)
Eximius Design
Associate Director - SoC Lead (3 yrs 1 mo)
Intel Corporation
Engineer, Sr Staff Manager - IP Lead (1 yr 1 mo)
Mentor Graphics
Member Consulting Staff (3 yrs 8 mos)
Lead Member Technical Staff (3 yrs 6 mos)
Sr. Member Tech. Staff (2 yrs 3 mos)
nSys Design Systems
Design Engineer (11 mos)
Sr. Design Engineer (3 yrs 5 mos)
Self-employed
Self Employed (11 mos)
Education
Ex MBA : Senior Management Program (SMP) at Indian Institute of Management, Calcutta
Advanced PG Diploma at Semiconductor Complex Ltd (VEDANT) (Department of ISRO)
AISSE at Shiv-Vani Model Senior Secondary School
