Prashant Seetharaman

CEO

Portland, Oregon, United States12 yrs 6 mos experience
Highly Stable

Key Highlights

  • 10+ years in ASIC & RTL development
  • Increased user retention by 25% through innovative platform
  • Led development of Amplify 2.0 EDA tools, boosting engagement by 50%
Stackforce AI infers this person is a semiconductor design expert with a strong focus on EDA tools and AI integration.

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Skills

Core Skills

Asic & Rtl DevelopmentDft

Other Skills

Product Lifecycle ManagementSilicon Lifecycle ManagementRTL DevelopmentRTL CodingProduct MarketingKeynote SpeakingVHDLProduct DevelopmentProgram ManagementLeadershipTeamworkMarket ResearchTeam ManagementVLSIData Analytics

About

With 10+ years of experience, I excel at delivering innovative and robust solutions that meet the needs and expectations of our customers and partners. My core competencies include ASIC & RTL development, programming, P&R, and machine learning techniques. I have a strong background in semiconductor IC design flow, memory BIST, repair, and diagnosis. In my current role, I work with DFT tools with a focus on memory BIST, repair, and diagnosis. I use my skills in RTL coding, simulation, validation, debug, and optimization to drive product adoption and customer satisfaction. I also leverage my knowledge of AI/ML to analyze and improve the performance and quality of our products and processes. I have contributed to multiple projects and initiatives that have enhanced our product portfolio and market position. For example, I helped increase the user retention rate by 25% by implementing a web-based platform for investors and business clients to view and update their shares. I also supported the global channel strategy and development of Amplify 2.0, a suite of EDA tools that increased engagement and reach by 50%. I enjoy working with a diverse and talented team that shares my vision and values of excellence, collaboration, and continuous learning.

Experience

12 yrs 6 mos
Total Experience
3 yrs
Average Tenure
1 yr 7 mos
Current Experience

Siemens

National Lead, NEXT ERG

Oct 2024Present · 1 yr 7 mos · Hybrid

Siemens digital industries software

2 roles

Principal Architect

Promoted

Jan 2024Present · 2 yrs 4 mos

  • Lead strategic relationships with industry key opinion leaders, driving collaboration on advanced node design challenges, novel memory architectures, and DfT implementations while evangelizing and directly engaging target collaborators in the IC design ecosystem.
  • Present at leading industry conferences on IC design automation, memory technology roadmaps, and memory test innovations while authoring technical content and championing GenAI/LLM adoption for accelerating complex semiconductor design tasks from layout optimization to test pattern generation.
  • Drive new product definitions and feature enhancements for emerging memories (MRAM, ReRAM, DRAM) within EDA design flows, leveraging extensive foundry and memory IP provider collaboration to bridge novel device physics with practical design implementation.
Product Lifecycle ManagementSilicon Lifecycle ManagementASIC & RTL developmentDFT

Product Engineer - EDA / AI workflows

Jan 2021Jan 2024 · 3 yrs

  • Develop EDA strategies with cross-functional Product and Engineering teams, focusing on IC design flows and Design of Test methodologies for advanced semiconductor technologies in collaboration with Arm, TSMC, GlobalFoundries, Intel, and emerging memory startups.
  • Manage Arm infrastructure collaboration and asset integration within Siemens EDA, optimizing access to Arm's IP portfolio and reference designs to enable seamless integration of Arm cores with advanced memory subsystems.
  • Deliver technical tutorials on IC design methodologies and emerging memory flows at premier conferences (DAC, ICCAD, ISSCC) while conducting strategic discussions with early adopters of advanced EDA suites for sub-7nm nodes and 3D integration.
  • Build comprehensive testcases for emerging memory characterization and DfT validation, review complex design scenarios with foundry partners, and support field engineering and application engineering teams in production deployments.
RTL DevelopmentRTL CodingASIC & RTL developmentDFT

Mentor graphics

Business Development Manager

Jan 2017Dec 2020 · 3 yrs 11 mos

Cognizant technology solutions

Senior Software Engineer

Apr 2015May 2016 · 1 yr 1 mo · Chennai Area, India

Nsn - nokia solutions and networks

Software Engineer

Feb 2013May 2016 · 3 yrs 3 mos · Chennai Area, India

Education

UC Berkeley College of Engineering

Computer Engineering — Data Science

San Francisco State University

Master’s Degree — Embedded Electrical & Computer Systems

Anna University Chennai

Bachelor's Degree

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