Jeevan K Y — Software Engineer

Hi there, I’m passionate about technology and seeing the processors that I have helped create in the hands of users is an incredibly proud and rewarding experience for me. I started my career with conformal LEC signoff ownership and have grown into my current role as Senior SOC design engineer at Intel. During my seven year tenure I have worked on multiple technology nodes from 14 nm to 3nm, used various tools (conformal LEC, DC, DCT, ICC2, FC), various designs of different complexities (Latch based, Macro/standard cell dominant, low-power, 3DIC), have had the opportunity to solve challenges across various domains (RTL, Tool flow & methodology, Implementation, Post Si issues) and I consider myself extremely lucky for having the opportunity to collaborate with technical leaders who have inspired me to learn and grow. Thanks for going over my profile, Looking forward to hearing from you. Jeevan K Y

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in SOC physical design and LEC methodologies.

Location: Bengaluru, Karnataka, India

Experience: 8 yrs 7 mos