Venu Naik — Software Engineer
I have overall 7 years of experience including 14 months of internship. Currently working as a Sr Application Engineer ll @ Synopsys India Pvt Ltd Hyd. worked as M.T.S in AMD India Pvt Ltd, And Completed 2 tapeouts in LEC( Formal Equivalence both power aware and non- power Aware) I did M.Tech From Indian Institute of Technology(BHU) varanasi with an CGPA of 8.4/10. Language: VERILOG,SYSTEM VERILOG TOOLS: Formality, Conformal, VCLP, Design Compiler, VIRTUOSO, Innovus
Stackforce AI infers this person is a VLSI design engineer with expertise in formal verification and low-power design.
Experience: 10 yrs 6 mos
Skills
- Formal Verification
- Low-power Design
Career Highlights
- 7 years of experience in VLSI and formal verification.
- Successfully completed 2 tapeouts in LEC.
- Expert in low-power design and formal verification tools.
Work Experience
Synopsys Inc
Staff Engineer (2 yrs 6 mos)
Staff Field Application Engineer (3 yrs 1 mo)
Sr Application Engineer II (1 yr 6 mos)
Sr Application Engineer I (2 yrs 3 mos)
AMD
Member Of Technical Staff (1 yr 5 mos)
AMD
CAD Design Engineer II (11 mos)
Cadence Design Systems
Sr Application Engineer (1 yr 10 mos)
Education
Master's Degree at IIT(BHU) VARANASI