Yedukondalu Meegada

Software Engineer

Bengaluru, Karnataka, India7 yrs 9 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Experienced in Physical Design and VLSI methodologies.
  • Proficient in multiple scripting languages including TCL and Perl.
  • Strong background in Design Rule Checking and LVS.
Stackforce AI infers this person is a Physical Design Engineer with expertise in VLSI and semiconductor industries.

Contact

LinkedIn

Skills

Core Skills

Physical DesignDesign Rule Checking (drc)

Other Skills

TCLPerlUnixLinuxicc2Layout Versus Schematic (LVS)

Experience

7 yrs 9 mos
Total Experience
3 yrs 10 mos
Average Tenure
4 yrs 6 mos
Current Experience

Mediatek

2 roles

Staff Engineer

Promoted

Jun 2025 – Present · 10 mos

Physical DesignTCLPerlUnixLinuxicc2+2

Sr.Engineer

Oct 2021 – Jul 2025 · 3 yrs 9 mos

Soctronics

Physical Design Engineer

Jul 2018 – Oct 2021 · 3 yrs 3 mos

Education

VEDA IIT

physical design engineer trainee — VLSI

Jan 2018 – Jan 2018

Vasavi College of Engg

Bachelor's degree

Jan 2014 – Jan 2017

government institute of electronics

diploma — industrial electornics and instrumentaion engineering

Jan 2010 – Jan 2014

ZPHS rudrapaka

SSC

Jan 2005 – Jan 2010

Stackforce found 100+ more professionals with Physical Design & Design Rule Checking (drc)

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