Mahesh Arumugam

CEO

Bengaluru, Karnataka, India19 yrs experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Lead role at Intel Corporation with extensive VLSI expertise.
  • Proven track record in design verification across multiple projects.
  • Strong foundation in RTL coding and functional verification.
Stackforce AI infers this person is a VLSI Design and Verification Engineer with a focus on semiconductor projects.

Contact

LinkedIn

Skills

Core Skills

VlsiFunctional Verification

Other Skills

VerilogFPGAVHDLTCLSystemVerilogRTL codingRTL designNCSimASICModelSimPerlDesign Verification

Experience

19 yrs
Total Experience
4 yrs 9 mos
Average Tenure
8 yrs 3 mos
Current Experience

Intel corporation

Lead

Jan 2018 – Present · 8 yrs 3 mos · India

VLSIVerilogFPGAVHDLTCLSystemVerilog+7

Truechip solutions

Verification Lead

Jul 2012 – Jan 2018 · 5 yrs 6 mos · India

Adventura technologies(ind) pvt ltd.

Design Verification Engineer

Jul 2010 – Jun 2012 · 1 yr 11 mos · India

  • VLSI Design and Verification Engineer in CSI-2,CSI-3,SD,MMC,SDIO Projects with 7 month (July 2010 – till date) of experience in AdVenturA technologies.

Arasan chip systems

Design Verification Engineer

Feb 2007 – Jun 2010 · 3 yrs 4 mos · India

  • VLSI Design and verification Engineer in Projects CSI-2,SD,MMC with 3 years 5 months (Feb 2007 – June 2010) of experience in Arasan Chip Systems Inc

Education

Anna University Chennai

B.E — ECE

Jan 2002 – Jan 2006

Punitha Arulappar higher sec school

Schooling

Jan 2000 – Jan 2002

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