Deeksha L — Software Engineer
Physical Design Engineer with 6+ years of hands-on experience in advanced semiconductor design, specializing in APR flow, Timing Closure (STA), Physical Verification, ECO, EM/IR analysis and cleanup, Conformal Low Power and multi-power domain architectures. Currently focused on N3E technology for 5G modem development, leveraging Cadence Innovus to drive performance, power, and area (PPA) optimization to meet stringent design goals.
Stackforce AI infers this person is a Physical Design Engineer specializing in semiconductor technology.
Location: Bengaluru, Karnataka, India
Experience: 7 yrs 5 mos
Skills
- Physical Design
- Physical Verification
Career Highlights
- 6+ years in advanced semiconductor design.
- Expert in Timing Closure and Physical Verification.
- Focused on N3E technology for 5G modem development.
Work Experience
MediaTek
ASIC Physical Design Engineer (4 yrs 7 mos)
Wipro
VLSI Engineer (2 yrs 1 mo)
RV-VLSI VLSI and Embedded Systems Design Center
ASIC Physical Design Trainee (6 mos)
Accenture
Associate Software Engineer (3 mos)
Education
Bachelor of Engineering - BE at N M A M Institute of Technology, NITTE
