Pranathi Nalam — Software Engineer
TECHNICAL SKILL SET:- HDL : Verilog HDVL : System Verilog Verification Methodology : UVM Scripting languages : Perl, MATLAB Knowledge : RTL coding, FSM based design, Basics of Static Timing Analysis concepts, Clock domain crossing basic concepts, Code coverage, Functional coverage, Waveform debug, Simulation. Simulation tools : VCS - Synopsys. Protocols : AXI, APB, PCIE.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in PCIE and UVM methodologies.
Location: East Godavari, Andhra Pradesh, India
Experience: 4 yrs 10 mos
Skills
- Verification Methodology
- Pcie
Career Highlights
- Expert in Verification Methodology and PCIE.
- Proficient in developing test environments for semiconductor verification.
- Strong foundation in RTL coding and digital electronics.
Work Experience
NVIDIA
Senior Verification Engineer (1 yr 1 mo)
Verification Engineer (1 yr 2 mos)
Analog Devices
Design Verification Engineer (1 yr 7 mos)
Ceremorphic, Inc.
Engineer (1 yr)
Education
Bachelor of Technology at National Institute of Technology Puducherry
Higher Secondary at Tirumala Junior College
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