Madharajula chandra sekhar

Software Engineer

Chittoor, Andhra Pradesh, India1 yr 7 mos experience

Key Highlights

  • Experienced in Static Timing Analysis and DRC.
  • Proficient in IC Compiler II and STARRC tools.
  • Strong foundation in Digital Electronics and scripting.
Stackforce AI infers this person is a Physical Design Engineer in the Semiconductor industry.

Contact

LinkedIn

Skills

Core Skills

Static Timing AnalysisDesign Rule Checking (drc)

Other Skills

STARRCIC Compiler IIprime timeSTARRC ToolTCL ScriptingUnixCygwinCMOSLinuxDigital Electronics

Experience

1 yr 7 mos
Total Experience
1 yr 7 mos
Average Tenure
1 yr 7 mos
Current Experience

Mediatek

Physical Design Engineer

Oct 2024 – Present · 1 yr 7 mos · Bengaluru, Karnataka, India · On-site

Static Timing AnalysisDesign Rule Checking (DRC)STARRCIC Compiler IIprime timeSTARRC Tool+6

Education

sree vidyanikethan engineering college

Bachelor of Engineering - BE — Electrical and Electronics Engineering

Jul 2018 – Jun 2021

Stackforce found 100+ more professionals with Static Timing Analysis & Design Rule Checking (drc)

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