Ravi Pamula

Software Engineer

Bengaluru, Karnataka, India4 yrs 9 mos experience
Highly Stable

Key Highlights

  • Experienced in STA and Physical Synthesis.
  • Proficient in multiple EDA tools and methodologies.
  • Strong background in Embedded Systems and Electronics.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in STA and Physical Synthesis.

Contact

LinkedIn

Skills

Core Skills

StaPhysical Synthesis

Other Skills

SDC CheckerCDCCTCERCPTPXCCFAutomatic Test Pattern Generation (ATPG)Design Rule Checking (DRC)CTS SanityCLPConformal LECCVerilogVHDLCadence Virtuoso

Experience

4 yrs 9 mos
Total Experience
4 yrs 9 mos
Average Tenure
4 yrs 9 mos
Current Experience

Mediatek

3 roles

Staff Engineer

Jun 2024 – Present · 1 yr 11 mos

STASDC CheckerCDCCTCERCPTPX+19

Senior Engineer

Aug 2021 – Aug 2024 · 3 yrs

Synthesis and STA Engineer

Jul 2019 – Aug 2021 · 2 yrs 1 mo

Education

National Institute of Technology Calicut

Master of Technology — Electronics Design and Technology.

Jan 2016 – Jan 2018

SIR C R REDDY COLLEGE OF ENGINEERING

Bachelor of Engineering - BE — Electronics and Communications Engineering

Jan 2012 – Jan 2015

SIR C R REDDY POLYTECHNIC, ELURU

DIPLOMA — Electronics and Communications Engineering

Jan 2009 – Jan 2012

ZPH SCHOOL

SSC

Jan 2008 – Jan 2009

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