Shashank Gupta — Software Engineer
• Technology driven professional with 8+ years of experience in RTL front end design and verification. • Experience in RTL Integration, IP integration, IP verification, SoC verification. • Experience in writing assertions & coverage along with corresponding test plan. • Experience in FPGA front-end design, synthesis, floor planning. • Experience on System Verilog, Verilog, VHDL, C/C++ • Hands-on Xilinx devices- Virtex Ultrascale Plus, Kintex-7, Artix-7, Spartan, Altera-Max10 devices. • Good understanding of display protocols viz. DP1.4/DP2.0/Edp1.4/Edp1.5. • Worked on the multiple Discrete Graphics products. • Worked on UART, SPI, I2C, AXI4, PCIe protocols.
Stackforce AI infers this person is a VLSI Design Engineer with expertise in FPGA and SoC verification.
Location: Bengaluru, Karnataka, India
Experience: 9 yrs 5 mos
Career Highlights
- 8+ years in RTL front end design and verification.
- Expertise in FPGA design and multiple display protocols.
- Hands-on experience with Xilinx and Altera devices.
Work Experience
AMD
Member of Technical Staff (9 mos)
Senior Silicon Design Engineer (3 yrs 6 mos)
Intel Corporation
Graphics Hardware Engineer (3 yrs 1 mo)
VVDN Technologies
Design Engineer (1 yr 3 mos)
DKOP Labs Pvt. Ltd.
VLSI Intern (4 mos)
DLOGIC Institue Pvt Ltd.
Instructor (10 mos)
Education
Master of Technology (M.Tech.) at Institute of Engineering and Technology
Bachelor of Technology (B.Tech) at IEC college of Engineering and technology, Greater noida
at St. Joseph's school, Auraiya, U.P.