Sachidanand Prajapati

Software Engineer

Bengaluru, Karnataka, India5 yrs 11 mos experience
Highly Stable

Key Highlights

  • Experienced in Logic Design and RTL Verification.
  • Proficient in Verilog and Digital IC Design.
  • Strong background in Neural Networks and MATLAB.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in digital design and verification.

Contact

LinkedIn

Skills

Core Skills

Logic DesignRtl VerificationBistDigital Ic Design

Other Skills

Python (Programming Language)Neural NetworksMATLABLinear AlgebraDigital Image ProcessingComputer VisionVerilogC++

Experience

5 yrs 11 mos
Total Experience
1 yr 8 mos
Average Tenure
9 mos
Current Experience

Qualcomm

Senior Engineer

Jul 2025 – Present · 9 mos · Bengaluru, Karnataka, India · On-site

Logic DesignBISTRTL VerificationPython (Programming Language)Neural NetworksMATLAB+6

Mediatek

Senior Engineer

Jul 2022 – Jul 2025 · 3 yrs · Bengaluru, Karnataka, India

BISTLogic Design

Indian institute of technology, guwahati

Overall Placement Coordinator

Jun 2021 – Jun 2022 · 1 yr

Maven silicon

Intern

Feb 2021 – Mar 2021 · 1 mo

  • RISC-V RV32I RTL Design using Verilog HDL

Tata consultancy services

Assistant System Engineer

Jun 2019 – Aug 2020 · 1 yr 2 mos

Education

Indian Institute of Technology, Guwahati

Master of Technology - MTech — Communication Engineering

Jan 2020 – Jan 2022

Kamla Nehru Institute of Technology, Sultanpur

Bachelor of Technology - BTech — Electronics Engineering

Jan 2015 – Jan 2019

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