Veerraju Masimukkula — Director of Engineering
> 14+ years of experience in end to end DFT, including scan architecture, scan insertion, scan verification, ATPG, coverage analysis, IOBIST, MBIST, JTAG, pattern delivery, pattern bring up, debug, validation, and Single Chain Mode validation and bring up. > Lead and Manage teams successfully in executing and delivering on time quality deliverables. > Involved in many SoC tapeouts from 40nm to 3nm . > Worked closely with testing teams in validating and debugging the test vectors. Debugged many silicon issues like high current spikes, dynamic voltage drop etc. > Worked with design and PD teams in defining test constraints and timing closure. > Developed multiple scripts to automate TPG, package simulations, power aware simulations etc.
Stackforce AI infers this person is a semiconductor design expert with extensive DFT and validation experience.
Location: Hyderabad, Telangana, India
Experience: 15 yrs 5 mos
Career Highlights
- 14+ years in DFT and SoC tapeouts.
- Expert in scan architecture and validation.
- Proven leadership in managing engineering teams.
Work Experience
Alphawave Semi
Senior Manager - ASIC Design (1 yr 11 mos)
AMD
SMTS/Manager (3 yrs 6 mos)
Broadcom Limited
R&D Engineer IC Design 4 (3 yrs 4 mos)
MediaTek
Staff Engineer (1 yr)
Sr. Engineer (1 yr 2 mos)
AppliedMicro
Sr. Design Engineer (1 yr 11 mos)
Design Engineer (2 yrs 7 mos)
Education
M.Tech at Indian Institute of Technology, Bombay
B.Tech at Jawaharlal Nehru Technological University