Mounica Vaddepally

Software Engineer

Hyderabad, Telangana, India6 yrs 6 mos experience

Highly Stable

Key Highlights

Expert in PDK Development and Physical Design.
Proficient in ESD and Power Integrity analysis.
Experienced in leading reliability verification projects.

Stackforce AI infers this person is a Semiconductor Engineering Specialist with expertise in ESD and Power Integrity.

Contact

Skills

Core Skills

Pdk Development (l0)Physical DesignSynopsys Icv PercPower Integrity

Other Skills

IR/EM/ESD Signoffreliability verificationRedhawk scCadence VirtuosoIcc2InnovusCadence Pegasus PERCPDN engineerESD Analysis in Calibre PERCEMIR analysis in Voltus and RHUnixPerlTCLSed & AwkStatic Timing Analysis

Experience

6 yrs 6 mos

Total Experience

3 yrs

Average Tenure

7 mos

Current Experience

Micron technology

Senior Engineer

Oct 2025 – Present · 7 mos · Hyderabad, Telangana, India · On-site

PDK Development (L0)IR/EM/ESD Signoffreliability verificationRedhawk scCadence VirtuosoIcc2+13

Intel corporation

PERC ESD Enablement Engineer

May 2022 – Oct 2025 · 3 yrs 5 mos · India

Synopsys ICV PERCEMIR analysis in VoltusRH

Soctronics

Power Integrity and Reliability Signoff Engineer

Nov 2019 – Jun 2022 · 2 yrs 7 mos · Hyderabad Area, India

PDN engineerPhysical DesignPower Integrity

Veda iit

Physical Design Engineer Trainee

May 2019 – Oct 2019 · 5 mos

Physical DesignInnovus

Education

Chaitanya Bharathi Institute Of Technology

Bachelor of Engineering - BE

Jun 2016 – May 2019

Government Institute Of Electronics

Diploma of Education (SCN)

Jul 2012 – Jan 2016

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