SARAT C. — Software Engineer
I'm working on physical design closure in terms of block closure, timing, power stripe issues, dynamic IR issues. Expertized in Perl scripting and rated myself 9 out of 10. I'm good team player. I had hands on experience on Synopsys PnR tools. Looking for Individual contributor and helps the other teammates I helped students and colleagues to get jobs. Nearly 9-10 members got job directly in VLSI. It is part of my interests. Recommend me in your views about me.
Stackforce AI infers this person is a VLSI design engineer with expertise in physical design and scripting.
Location: Bengaluru, Karnataka, India
Experience: 12 yrs 10 mos
Skills
- Physical Design
Career Highlights
- Expert in physical design closure and timing issues.
- Strong Perl scripting skills rated 9 out of 10.
- Successfully assisted 9-10 members in securing VLSI jobs.
Work Experience
Analog Devices
Staff Engineer (1 yr 6 mos)
MediaTek
Contractor (4 mos)
Intel Corporation
Contractor (1 yr 8 mos)
DPIIND
Senior Design Engineer (2 yrs 11 mos)
Eximius Design
physical design (11 mos)
Altran
Senior Physical Design Engineer (2 yrs 3 mos)
Advanced Engineer (1 yr 6 mos)
eSilicon
Contractor - physical design (1 yr 5 mos)
NXP Semiconductors
Contractor (4 mos)
Infineon Technologies
Contractor (5 mos)
AMD
Contractor (5 mos)
PMC-Sierra is now Microsemi
Contractor (8 mos)
Silabtech Pvt Ltd
Contractor (6 mos)
SiCon Design Technologies Pvt. Ltd.
Design Engineer (2 yrs 10 mos)
ST Microelectronics,Greater noida, INDIA
SOC Encounter,IC Compiler,ECO flow,DRC and LVS (11 mos)
Education
Master of Science (MS) at Manipal Academy of Higher Education
Bachelor of Technology (B.Tech.) at Sri Sun Flower College of Engineering and Technology