Shreyansh Mishra — Software Engineer
---GRADUAL PROGRESS >= PERFECTION--- A B.Tech. ECE 2020 graduate from IIIT ALLAHABAD. Having work experience in the fields of VLSI, Digital Electronics, HDL(verilog & system verilog), my interest lies in physical design, digital design/ verification roles. Skills :- System Verilog, Verilog , UVM, C,OOP, TCL, Digital Design & Verification Tools :- Primetime, Tempus, Quantus, Catapult HLS, QuestaSim, Xilinx Vivado, Modelsim, cadence virtuoso, Matlab Platform :- Linux, Windows
Stackforce AI infers this person is a VLSI and Digital Design Engineer with expertise in verification methodologies.
Location: Noida, Uttar Pradesh, India
Experience: 6 yrs 2 mos
Skills
- Very-large-scale Integration (vlsi)
- System Verilog
Career Highlights
- Experienced in VLSI and Digital Design roles.
- Proficient in System Verilog and UVM methodologies.
- Strong background in physical design and verification.
Work Experience
NXP Semiconductors
Senior Lead STA Engineer (1 yr 10 mos)
Qualcomm
Engineer (1 yr 8 mos)
Associate Engineer (1 yr 4 mos)
Cadence Design Systems
Software Engineer (11 mos)
Mentor Graphics
Catapult HLS QA Intern (5 mos)
HEP Trainee (2 mos)
Education
Bachelor of Technology at Indian Institute Of Information Technology Allahabad
