shankar narayana reddy c

Software Engineer

Bengaluru, Karnataka, India12 yrs 3 mos experience

Highly Stable

Key Highlights

Over 12 years of experience in VLSI physical design.
Expertise in block level physical design for advanced nodes.
Hands-on experience with DRC, LVS, and ECO processes.

Stackforce AI infers this person is a VLSI physical design expert with extensive experience in semiconductor technology.

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Skills

Core Skills

Physical Design

Other Skills

Block level physical design8nm7nmFloorplanDRCLVSECOLinuxCTSFloorplanningDesign Rule Checking (DRC)

About

Having 12.6 years of experience on sub-system/block level VLSI physical design.

Experience

12 yrs 3 mos

Total Experience

2 yrs 5 mos

Average Tenure

Current Experience

Mediatek

Staff Engineer

Aug 2020 – Apr 2025 · 4 yrs 8 mos · Greater Bengaluru Area · On-site

Qualcomm

Sr Lead Engineer

Sep 2018 – Mar 2020 · 1 yr 6 mos · Bangalore India

Worked on Block level physical design with partition blocks. Hands-on 8nm/7nm on 2 projects from FLoorplan to DRC/LVS till ECO.

Block level physical design8nm7nmFloorplanDRCLVS+2

Wafer space semiconductor technologies private limited

Sr Design Engineer II

Apr 2016 – Aug 2018 · 2 yrs 4 mos · koramanagala bengaluru india

Mirafra technologies

Physical Design Engineer

Aug 2015 – Mar 2016 · 7 mos · Bengaluru, Karnataka, India

worked on block level physical design till ECO phase to GDSII

Sankalp semiconductor

Design Engineer

Jun 2012 – Aug 2015 · 3 yrs 2 mos · Bengaluru, Karnataka, India

working on block level deisgns on 28nm around 50k standard cell deisgns

Education

VIT_Vellore Institute of Technology

Master of Technology - MTech — MTECH VLSI design

Jan 2008 – Jan 2010

Jawaharlal Nehru Technological University

Bachelor of Technology - BTech

Jan 2004 – Jan 2008

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